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max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators ????????????????????????????????????????????????????????????????? maxim integrated products 1 19-5991; rev 1; 1/12 general description the max16928 is a highly integrated power supply for automotive tft-lcd applications. the device inte - grates one boost converter, one 1.8v/3.3v regulator controller, and two gate voltage regulators. the device comes in several versions to satisfy common automotive tft-lcd power-supply requirements (see the ordering information table). the boost converter uses spread-spectrum modulation to reduce peak interference and to optimize emi performance. the sequencing input (seq) allows flexible sequencing of the positive-gate and negative-gate voltage regulators. the power-good indicator (pgood) indicates a failure on any of the converters or regulator outputs. integrated thermal shutdown circuitry protects the device from over - heating. the max16928 is available in a 20-pin tssop pack - age with exposed pad and operates over the -40 n c to +105 n c temperature range. applications automotive dashboards automotive central information displays automotive navigation systems features s high-power (up to 6w) boost output providing up to 18v s 1.8v or 3.3v regulator provides 500ma with external npn transistor s one positive-gate voltage regulator capable of delivering 20ma at 28v s one negative-gate voltage regulator s high-frequency 2.2mhz operation s flexible stand-alone sequencing s true shutdown? boost converter s internal soft-start s overtemperature shutdown s -40 n c to +105 n c operation s aec-q100 qualified true shutdown is a trademark of maxim integrated products, inc. typical operating circuit appears at end of data sheet. ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to: www.maxim-ic.com/max16928.related e v a l u a t i o n k i t a v a i l a b l e for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com.
????????????????????????????????????????????????????????????????? maxim integrated products 2 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators ina, compv, fbp to gnd ...................................... -0.3v to +6v pgood to gnd ...................................................... -0.3v to +6v cp, gh to gnd ..................................................... -0.3v to +31v cp, gh to gnd (v ina = 3.3v) .............................. -0.3v to +29v lxp to gnd ........................................................... -0.3v to +20v drvn to gnd ........................................................ -25v to +0.3v enp, dr, fb, gate, compi, fbgh, fbgl, ref, seq to gnd ..................... -0.3v to (v ina + 0.3v) gnd to pgndp .................................................... -0.3v to +0.3v continuous power dissipation (t a = +70 n c) tssop (derate 26.5mw/ n c above +70 n c) ................ 2122mw operating temperature range ........................ -40 n c to +105 n c junction temperature range ........................... -40 n c to +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c tssop junction-to-ambient thermal resistance ( b ja ) ....... 37.7 n c/w junction-to-case thermal resistance ( b jc ) ................. 2 n c/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) electrical characteristics (v ina = 5v, v gnd = v pgndp = 0v, t a = t j = -40 n c to +105 n c, typical values are at t a = +25 n c unless otherwise noted.) (note 2) parameter symbol conditions min typ max units boost, positive (gh), negative (gl), 1.8v/3.3v converters ina input supply range 3 5.5 v ina undervoltage lockout threshold v ina rising, hysteresis = 200mv, t a = +25 n c 2.5 2.7 2.9 v ina supply current i ina v fbp = v fbgh = 1.3v, v fbgl = 0v, lxp not switching 1.5 2.0 ma ina shutdown current i shdn v enp = 0v, t a = +25 n c 0.5 f a thermal shutdown temperature t shdn temperature rising +165 n c thermal shutdown hysteresis t h 15 n c duration to trigger fault condition v fbp , v fbgh , or v fbgl below its threshold 238 ms autoretry time 1.9 s reference (ref) ref output voltage v ref no output current 1.236 1.25 1.264 v ref load regulation 0 < i ref < 80 f a, ref sourcing -2 +2 % ref undervoltage lockout threshold rising edge, hysteresis = 200mv 1.165 v oscillator spread-spectrum factor ssr as a percentage of switching frequency, f sw q 4 %
????????????????????????????????????????????????????????????????? maxim integrated products 3 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators electrical characteristics (continued) (v ina = 5v, v gnd = v pgndp = 0v, t a = t j = -40 n c to +105 n c, typical values are at t a = +25 n c unless otherwise noted.) (note 2) parameter symbol conditions min typ max units boost converter switching frequency f sw 1.98 2.20 2.42 mhz maximum duty cycle 82 93.5 % lxp current limit i lim duty cycle = 70%, c compi = 220pf low boost current- limit option 0.625 0.78 a high boost current- limit option 1.25 1.56 1.87 lxp on-resistance r ds_on(lxp) i lxp = 200ma 110 250 m i lxp leakage current i lk_lxp v lxp = 20v, t a =+25 n c 8.5 20 f a soft-start time (note 3) 30 ms output voltage range v sh v ina 18 v fbp regulation voltage v fbp v ina = +3v to +5.5v, 0 < i load < full load t a = +25 n c 0.985 1.0 1.015 v t a = -40 n c to +105 n c 0.98 1.0 1.02 pgood threshold v pg_fbp measured at fbp 0.74 0.85 0.96 v fbp load regulation 0 < i load < full load -1 % fbp line regulation v ina = +3v to +5.5v 0.1 %/v fbp input bias current v fbp = +1v, t a = +25 n c q 1 f a fbp to compv transconductance d i = q 2.5 f a at compv, t a = +25 n c 400 f s positive-gate voltage regulator (gh) output voltage range v gh with external charge pump, t a = +25 n c (maximum v cp = 29.5v) 5 29 v cp overvoltage threshold t a = +25 n c (note 4) 29.5 30.5 v fbgh regulation voltage v fbgh i gh = 1ma 0.96 1.0 1.034 v pgood threshold v pg_fbgh measured at fbgh 0.83 0.85 0.87 v fbgh load regulation i gh = 0 to 20ma 2 % fbgh line regulation v cp = 12v to 20v at v gh = 10v, i gh = 10ma 2 % fbgh input bias current v fbgh = 1v, t a = +25 n c q 1 f a gh output current i gh v cp - v gh = 2v 20 ma gh current limit i lim_gh 35 56 ma gh soft-start time 7.45 ms negative-gate voltage regulator (gl) output voltage range v drvn -24 -2 v fbgl regulation voltage v fbgl i drvn = 100 f a 0.212 0.242 0.271 v pgood threshold v pg_fbgl measured at fbgl 0.38 0.4 0.42 v
????????????????????????????????????????????????????????????????? maxim integrated products 4 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators electrical characteristics (continued) (v ina = 5v, v gnd = v pgndp = 0v, t a = t j = -40 n c to +105 n c, typical values are at t a = +25 n c unless otherwise noted.) (note 2) note 2: specifications over temperature are guaranteed by design and not production tested. note 3: 50% of the soft-start voltage time is due to the soft-start ramp and the other 50% is due to the settling of the output voltage. note 4: after the voltage at cp exceeds this overvoltage threshold, the entire circuit switches off and autoretry is started. note 5: guaranteed by design; not production tested. note 6: fb power good is indicated by pgood. the condition v fb < v pg_fb does not shut down/restart the device. parameter symbol conditions min typ max units fbgl input bias current v fbgl = +0.25v q 1 f a drvn source current v fbgl = +0.5v, v drvn = -10v 2 ma drvn source current limit 2.5 4 ma gl soft-start time 7.45 ms 1.8v/3.3v regulator controller output voltage v fb v dr = v fb 3.3v regulator option 3.18 3.3 3.38 v 1.8v regulator option 1.746 1.8 1.854 fb pgood threshold v pg_fb measured at fb (notes 4, 6) 3.3v regulator option, fb rising 2.4 2.57 2.7 v 1.8v regulator option, fb rising 1.364 1.38 1.396 fb input bias current v fb = 1.8v 2.5 f a v fb = 3.3v 4.5 dr drive current v fb = 1.8v 4.5 6 ma input series switch control p-channel fet gate sink current v gate = 0.5v 33 55 75 f a gate voltage threshold measured at gate; below this voltage, the external p-channel fet is considered on 1.25 v digital logic enp, seq input pulldown resistor value r pd 500 k i enp, seq input-voltage low v il 0.3 x v ina v enp, seq input-voltage high v ih 0.7 x v ina v pgood leakage current i lk_in t a = +25 n c q 1 f a pgood output-voltage low v ol 2ma sink current, t a = +25 n c 0.4 v
????????????????????????????????????????????????????????????????? maxim integrated products 5 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators typical operating characteristics (v ina = +5v, v sh = +12v, v gh = +18v, v gl = -6v, v reg = 3.3v, t a = +25 n c, unless otherwise noted.) shutdown supply current max16928 toc01 input voltage (v) supply current (na) 5.0 4.5 4.0 3.5 1 2 3 4 5 6 7 8 9 10 0 3.0 5.5 efficiency vs. load current (boost) max16928 toc02 load current (ma) efficiency (%) 400 300 200 100 10 20 30 40 50 60 70 80 90 100 0 0 500 v ina = 5v v ina = 3.3v load regulation (boost) max16928 toc03 load current (a) error (%) 500 400 300 200 100 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 600 v ina = 5v v ina = 3.3v line regulation (boost) max16928 toc04 input voltage (v) error (%) 5.0 4.5 4.0 3.5 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 3.0 5.5 boost startup waveforms max16928 toc05 4ms/div v enp 5v/div v lxp 10v/div i lx 1a/div v sh 10v/div 50ma to 450ma load-transient response max16928 toc06 100s/div i sh 500ma/div 450ma 50ma v sh 200mv/div supply sequencing waveforms (v seq = 0v) max16928 toc07 10ms/div v enp 5v/div v gh 5v/div v sh 5v/div v reg 5v/div v gl 5v/div
????????????????????????????????????????????????????????????????? maxim integrated products 6 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators typical operating characteristics (continued) (v ina = +5v, v sh = +12v, v gh = +18v, v gl = -6v, v reg = 3.3v, t a = +25 n c, unless otherwise noted.) supply sequencing waveforms (v seq = v ina ) max16928 toc08 10ms/div v enp 5v/div v gh 5v/div v sh 5v/div v reg 5v/div v gl 5v/div load regulation (positive-gate voltage regulator) max16928 toc09 load current (ma) error (%) 18 16 12 14 4 6 8 10 2 -3.6 -3.2 -2.8 -2.4 -2.0 -1.6 -1.2 -0.8 -0.4 0 -4.0 0 20 line regulation (positive-gate voltage regulator) max16928 toc10 v cp voltage (v) error (%) 29 28 26 27 22 23 24 25 21 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 20 30 i load = 10ma i load = 20ma load regulation (negative-gate voltage regulator) max16928 toc11 load current (ma) error (%) 18 16 2 4 6 10 12 8 14 1 2 3 4 5 6 7 8 0 0 20 line regulation (negative-gate voltage regulator) max16928 toc12 v cn voltage (v) error (%) -10 -12 -16 -14 -20 -18 -22 -0.32 -0.24 -0.16 -0.08 0 0.08 0.16 0.24 0.32 0.40 -0.40 -24 -8 i load = 10ma i load = 20ma load regulation (3.3v regulator) max16928 toc13 load current (ma) error (%) 450 400 50 100 150 250 300 200 350 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0 -0.40 0 500 external npn transistor used load-transient response (3.3v linear regulator) max16928 toc14 100s/div i out 500ma/div 450ma 50ma v reg (ac-coupled) 100mv/div
????????????????????????????????????????????????????????????????? maxim integrated products 7 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators pin configuration pin description pin name function 1 enp boost circuitry and 1.8v/3.3v regulator controller enable input. enp has an internal 500k i pulldown resistor. drive high for normal operation and drive low to place the device in shutdown. 2 dr 1.8v or 3.3v regulator output. dr has a 4.5ma (min) drive capability. for greater output current capa - bility, use an external npn bipolar transistor whose base is connected to dr. 3 fb 1.8v or 3.3v regulator feedback input. fb is regulated to 1.8v or 3.3v. connect fb to dr when power - ing loads demanding less than 4.5ma. for greater output current capability, use an external npn bipo - lar transistor whose emitter is connected to fb. 4 gate external p-channel fet gate drive. gate is an open-drain driver connected to the gate of the external input series p-channel fet. connect a pullup resistor between gate and ina. during a fault condition, the gate driver turns off and the pullup resistor turns off the fet. 5 pgndp boost converter power ground 6 lxp boost converter switching node. connect lxp to the inductor and catch diode of the boost converter. 7 ina boost circuitry and 1.8v/3.3v regulator controller power input. connect ina to a 3v to 5.5v supply. 8 compv boost error amplifier compensation connection. connect a compensation network between compv to gnd. 9 fbp boost converter feedback input. fbp is regulated to 1v. connect fbp to the center of a resistive divid - er connected between the boost output and gnd. 10 n.c. no connection. not internally connected. 11 pgood open-drain power-good output. connect pgood to ina through an external pullup resistor. 12 cp positive-gate voltage regulator power input. connect cp to the positive output of the external charge pump. ensure that v cp does not exceed the cp overvoltage threshold as given in the electrical characteristics table. + top view tssop 17 4 fbgh gate 18 3 fbgl fb 19 2 ref dr 20 1 seq enp 14 7 drvn ina 15 6 gnd lxp 13 8 gh compv 12 9 cp fbp 11 10 pgood n.c. 16 5 compi pgndp ep max16928
????????????????????????????????????????????????????????????????? maxim integrated products 8 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators pin description (continued) detailed description the max16928 is a highly integrated power supply for automotive tft-lcd applications. the device integrates one boost converter, one 1.8v/3.3v regulator controller, one positive-gate voltage regulator, and one negative- gate voltage regulator. the device achieves enhanced emi performance through spread-spectrum modulation. digital input control allows the device to be placed in a low-current shutdown mode and provides flexible sequencing of the gate voltage regulators. internal thermal shutdown circuitry protects the device from overheating. the device is designed to shut down when its die temperature reaches +165 n c (typ) and to resume normal operation once its die temperature has fallen 15 n c. the device is factory-trimmed to provide a variety of power options to meet the most common automotive tft-lcd display power requirements, as outlined in the ordering information table. boost converter the boost converter employs a current-mode, fixed- frequency pwm architecture to maximize loop bandwidth and provide fast transient response to pulsed loads typical of tft-lcd panel source drivers. the 2.2mhz switching frequency allows the use of low-profile induc - tors and ceramic capacitors to minimize the thickness of lcd panel designs. the integrated low on-resistance mosfet and the devices built-in digital soft-start func - tions reduce the number of external components required while controlling inrush currents. the output voltage can be set from v ina to 18v with an external resistive voltage-divider. the regulator controls the output voltage by modulating the duty cycle (d) of the internal power mosfet in each switching cycle. the duty cycle of the mosfet is approximated by: ina o v d =1 v ? where v ina is the voltage at ina, v o = v sh (the boost output voltage), and e is the efficiency of the boost con - verter as shown in the typical operating characteristics . pin name function 13 gh positive-gate voltage regulator output 14 drvn negative-gate voltage regulator driver output. drvn is the open drain of an internal p-channel fet. connect drvn to the base of an external npn pass transistor. 15 gnd analog ground 16 compi boost slope compensation connection. connect a capacitor between compi and gnd to set the slope compensation. 17 fbgh positive-gate voltage regulator feedback input. fbgh is regulated to 1v. connect fbgh to the center of a resistive divider connected between gh and gnd. 18 fbgl negative-gate voltage regulator feedback input. fbgl is regulated to 0.25v. connect fbgl to the center of a resistive divider connected between ref and the output of the negative-gate voltage regulator. 19 ref 1.25v reference output. bypass ref to gnd with a 0.1 f f ceramic capacitor. 20 seq sequencing input. seq has an internal 500k i pulldown resistor. seq determines the sequence in which v gh and v gl power up. see table 1 for supply sequencing options. ep exposed pad. connect to a large contiguous copper ground plane for optimal heat dissipation. do not use ep as the only electrical ground connection.
????????????????????????????????????????????????????????????????? maxim integrated products 9 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators figure 1 shows the functional diagram of the boost regulator. an error amplifier compares the signal at fbp to 1v and changes the compv output. the volt - age at compv sets the peak inductor current. as the load varies, the error amplifier sources or sinks current to the compv output accordingly to produce the peak inductor current necessary to service the load. to main - tain stability at high duty cycles, a slope-compensation signal (set by the capacitor at compi) is summed with the current-sense signal. on the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel mosfet and applying the input voltage across the inductor. the current through the inductor ramps up linearly, storing energy in its magnetic field. once the sum of the current feedback signal and the slope compensation exceeds the compv voltage, the controller turns off the mosfet. the inductor current then flows through the diode to the output. the mosfet remains off for the rest of the clock cycle. the external p-channel fet controlled by gate protects the output during fault conditions and provides true shutdown of the converter. connect a pullup resistor between gate and ina (see the boost converter section to select the value for the pullup resistor). under normal operation, gate turns on the p-channel fet, connecting the supply to the boost input. during a fault condition or in shutdown, gate is off and the pullup resistor turns off the p-channel fet, disconnecting the supply from the boost input. figure 1. boost converter functional diagram logic and driver lxp clock pgndp v limit fbp compi compv error amp 1v 0.85v fault comparator to fault logic 2.2mhz oscillator pwm comparator i lim comparator soft- start current sense slope comp max16928
???????????????????????????????????????????????????????????????? maxim integrated products 10 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators spread-spectrum modulation the high-frequency 2.2mhz operation of the boost con - verter moves switching noise outside of the am band. the device achieves enhanced emi performance by modulating the switching frequency by q 4%. the modu - lating signal is pseudorandom and changes each switch - ing period (i.e., f ss = 2.2mhz). startup immediately after power-up, coming out of shutdown, or going into autoretry, the boost converter performs a short-circuit detection test on the output by connecting the input (ina) to the switching node (lxp) through an internal 50 i resistor. if the resulting voltage on lxp exceeds 1.2v, the device turns on the external pmos switch by pulling gate low. the boost output ramps to its final value in 15ms. an overloaded or shorted output is detected if the result - ing voltage on lxp is below 1.2v. the external pmos switch remains off and the converter does not switch. after the fault blanking period of 238ms, the device pulls pgood low and starts the autoretry timer. the short-circuit detection feature places a lower limit on the output load of approximately 46 i when the input voltage is 3v. fault conditions and pgood pgood signals whether all the regulators and the boost converter are operating normally. pgood is an open- drain output that pulls low if any of the following faults occur: 1) the boost output voltage falls below 85% of its set value. 2) the positive-gate voltage regulator output (v gh ) falls below 85% of its set value. 3) the negative-gate voltage regulator output (v gl ) falls below 85% of its set value. 4) the lxp voltage is greater than 21v (typ). 5) the positive charge-pump voltage (v cp ) is greater than 30.5v (typ). 6) the 1.8v/3.3v regulator output voltage falls below 85% of its nominal value. if any of the first three fault conditions persists for longer than the 238ms fault blanking period, the device pulls pgood low, turns off all outputs, and starts the autoretry timer. if either condition 4 or 5 occurs, the device pulls pgood low and turns off all outputs immediately. the device initi - ates startup only after the fault has cleared. if the last condition occurs, the device pulls pgood low, but does not turn off any of the outputs. during startup, pgood is masked and goes high as soon as the 1.8v/3.3v regulator controller turns on. this regulator turns on as soon as v ina exceeds the ina undervoltage lockout threshold. autoretry when the autoretry counter finishes incrementing after 1.9s, the device attempts to turn on the boost con - verter and gate voltage regulators in the order shown in table 1 . the device continues to autoretry as long as the fault condition persists. a fault on the 1.8v/3.3v regu - lator output causes pgood to go low, but does not result in the device shutting down and going into autoretry. current limit the effective current limit of the boost converter is reduced by the internally injected slope compensation by an amount dependent on the duty cycle of the converter. the effective current limit is given by: -12 lim(eff) lim_dc_0 compi d i =192 10 i c where i lim(eff) is the effective current limit, i lim_dc_0 = 1.1a or 2.2a, depending on the boost converter current- limit option, d is the duty cycle of the boost converter, and c compi is the value of the capacitor at the compi input. estimate the duty cycle of the converter using the formulas shown in the design procedure section. 1.8v/3.3v regulator controller the 1.8v/3.3v regulator controller delivers 4.5ma (min) to an external load. connect fb to dr for a regulated 1.8v/3.3v output. for higher output capability, use an external npn transis - tor as shown in the typical operating circuit . the drive capability of the regulator is then increased by the cur - rent gain of the transistor (h fe ). when using an external transistor, use dr as the base drive and connect fb to the transistors emitter. bypass the base to ground with a 0.1 f f ceramic capacitor. if the boost output current is greater than 300ma, con - nect a 30k i resistor between dr and gnd.
???????????????????????????????????????????????????????????????? maxim integrated products 11 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators positive-gate voltage regulator (gh) the positive-gate voltage regulator includes a p-channel fet output stage to generate a regulated output between 5v and (v cp - 2v). the regulator maintains accuracy over wide line and load conditions. it is capable of at least 20ma of output current and includes current-limit protec - tion. v gh is typically used to provide the tft-lcd gate drivers gate-on voltage. the regulator derives its positive supply voltage from a noninverting charge pump, a single-stage example of which is shown in the typical operating circuit . a higher voltage using a multistage charge pump is possible, as described in the charge pumps section. negative-gate voltage regulator (gl) the negative-gate voltage regulator is an analog gain block with an open-drain p-channel output. it drives an external npn pass transistor with a 6.8k i base-to-emitter resistor (see the pass transistor selection section). its guaranteed base drive source current is at least 2ma. v gl is typically used to provide the tft-lcd gate driv - ers gate-off voltage. the output of the negative-gate voltage regulator (i.e., the collector of the external npn pass transistor) has load- dependent bypassing requirements. connect a ceramic capacitor between the collector and ground with the value shown in table 3 . the regulator derives its negative supply voltage from an inverting charge pump, a single-stage example of which is shown in the typical operating circuit . a more negative voltage using a multistage charge pump is possible, as described in the charge pumps section. the external npn transistor is not short-circuit protected. to maintain proper pulldown capability of the external npn transistor and optimal regulation, a minimum load of at least 500 f a is recommended on the output of the gl regulator. enable (enp) use the enable input (enp) to enable and disable the boost section of the device. connect enp to ina for normal operation and to gnd to place the device in shut - down. in shutdown, the ina supply current is reduced to 0.5 f a. soft-start and supply sequencing (seq) when enabled, the boost output ramps up from v ina to its set voltage. once the boost output reaches 85% of the set voltage and the soft-start timer expires, the gate volt - age regulators turn on in the order shown in table 1 . the 1.8v/3.3v regulator controller is enabled at the beginning of the boost converters soft-start. both gate voltage regulators have a 7.45ms soft-start time. the second one turns on as soon as the output of the first reaches 85% of its set voltage. thermal shutdown internal thermal shutdown circuitry shuts down the device immediately when the die temperature exceeds +165 n c. a 15 n c thermal shutdown hysteresis prevents the device from resuming normal operation until the die temperature falls below +150 n c. design procedure boost converter inductor selection three key inductor parameters must be specified for operation with the device: inductance value (l), inductor saturation current (i sat ), and dc resistance (r dc ). to determine the inductance value, select the ratio of inductor peak-to-peak ripple current to average output current (lir) first. for lir values that are too high, the rms currents are high, and therefore, i 2 r losses are high. use high-valued inductors to achieve low lir values. typically, inductance is proportional to resistance for a given package type, table 1. supply sequencing control inputs supply sequencing enp seq first second third 0 x device is in shutdown 1 0 v sh v gh v gl 1 1 v sh v gl v gh
???????????????????????????????????????????????????????????????? maxim integrated products 12 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators which again makes i 2 r losses high for very low lir values. a good compromise between size and loss is to select a 30%-to-60% peak-to-peak ripple current to average-current ratio. if extremely thin high-resistance inductors are used, as is common for lcd-panel applications, the best lir can increase between 0.5 and 1.0. the size of the inductor is determined as follows: o o ina ina ina sw ina v i v d l and i lir i f v = = ina o 1- v d v = where v ina is the input voltage, v o is the output voltage, i o is the output current, i ina is the average boost input current, e is the efficiency of the boost converter, d is the duty cycle, and f sw is 2.2mhz (the switching fre - quency of the buck converter). the efficiency of the buck converter can be estimated from the typical operating characteristics and accounts for losses in the internal switch, catch diode, inductor r dc , and capacitor esr. capacitor selection the input and output filter capacitors should be of a low- esr type (tantalum, ceramic, or low-esr electrolytic) and should have i rms ratings greater than: ina rms lir i i = 12 for the input capacitor 2 rms o lir d + 12 i =i 1 d ? for the output capacitor where i ina and d are the input current and duty cycle given above. the output voltage contains a ripple component whose peak-to-peak value depends on the value of the esr and capacitance of the output capacitor and is approximately given by: d v ripple = d v esr + d v cap esr ina esr lir v =i (1+ ) r 2 ? o cap out sw i d v = c f ? where i ina and d are the input current and duty cycle given above. rectifier diode the catch diode should be a schottky type to minimize its voltage drop and maximize efficiency. the diode must be capable of withstanding a reverse voltage of at least v sh . the diode should have an average forward current rating greater than: i d = i ina (1-d) where i ina and d are the input current and duty cycle given above. in addition ensure that the peak current rat - ing of the diode is greater than: ina lir i 1+ 2 ? ? ? ? ? ? output voltage selection the output voltage of the boost converter can be adjust - ed by using a resistive voltage-divider formed by r top and r bottom . connect r top between the output and fbp and connect r bottom between fbp and gnd. select r bottom in the 10k i to 50k i range. calculate r top with the following equation: o top bottom fbp v r = r ( 1) v ? where v fbp , the boost converters feedback set point, is 1v. place both resistors as close as possible to the device and connect r bottom to the analog ground plane. loop compensation choose r compv to set the high-frequency integrator gain for fast transient response. choose c compv to set the integrator zero to maintain loop stability. for low-esr output capacitors, use table 2 to select the initial values for r compv and c compv . use a 22pf capacitor in paral - lel with r compv + c compv . table 2. compensation component values v sh (v) 8 18 i sh (ma) 200 200 v ina (v) 3.3 5 p in (w) 1.75 3.75 l (h) 5 5 r compv (k i ) 33 39 c compv (pf) 220 180 c compi (pf) 820 330
???????????????????????????????????????????????????????????????? maxim integrated products 13 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators to further optimize transient response, vary r compv in 20% steps and c compv in 50% steps while observ - ing transient-response waveforms. the ideal transient response is achieved when the output settles quickly with little or no overshoot. connect the compensation network to the analog ground plane. use the following formula to calculate the value for c compi : c compi 950 10 -6 l/(v sh + v schottky - v ina ) p-channel fet selection the p-channel fet used to gate the boost converters input should have low on-resistance. connect a resistor (r sg ) between the source and gate of the fet. under normal operation, r sg carries a gate drive current of 55 f a and the resulting gate source voltage (v gs ) turns on the fet. when the gate drive is removed under a fault condition or in shutdown, r sg bleeds off charge to turn off the fet. size r sg to produce the v gs needed to turn on the fet. 1.8v/3.3v regulator controller npn bipolar transistor selection there are two important considerations in selecting the pass npn bipolar transistor: current gain (h fe ) and power dissipation. select a transistor with an h fe high enough to ensure adequate drive capability. this condition is satisfied when i dr x (h fe + 1) is greater than the maxi - mum load current. the regulator can source i dr = 4.5ma (min). the transistor should be capable of dissipating: p npn_reg = (v ina C v reg_out ) i load(max) where v reg_out = 1.8v or 3.3v. bypass dr to ground with a 0.1 f f ceramic capacitor. for applications in which the boost output current exceeds 300ma, connect a 30k i resistor from dr to ground. supply considerations ina needs to be at least 4.5v for the 3.3v regulator to operate properly. charge pumps selecting the number of charge-pump stages for most applications, a single charge-pump stage is sufficient, as shown in the typical operating circuit . connect the flying capacitors to lxp. the output voltages generated on the storage capacitors are given by: v cp = 2 x v sh + v schottky - 2 x v d v cn = -(v sh + v schottky - 2 x v d ) where v cp is the positive supply for the positive-gate volt - age regulator, and v cn is the negative supply for the neg - ative-gate voltage regulator. where larger output voltages are needed, use multistage charge pumps (however, the maximum charge-pump voltage is limited by the absolute maximum ratings of cp and drvn). figure 2 and figure 3 show the configuration of a multistage charge pump for both positive and negative output voltages. for mutistage charge pumps the output voltages are: v cp = v sh + n (v sh + v schottky - 2 x v d ) v cn = -n (v sh + v schottky - 2 x v d ) for highest efficiency, choose the lowest number of charge-pump stages that meets the output requirement. the number of positive charge-pump stages needed is given by: gh dropout sh cp sh schottky d v +v v n = v +v 2 v ? ? and the number of negative charge-pump stages is given by: gl dropout cn sh schottky d |v |+v n = v v 2 v + ? where n cp is the number of positive charge-pump stag - es, n cn is the number of negative charge-pump stages, v gh is the positive-gate voltage regulator output volt - age, v gl is the negative-gate voltage regulator output voltage, v sh is the boost converters output voltage, v d figure 2. multistage charge pump for positive output voltage figure 3. multistage charge pump for negative output voltage v sh v cp lxp v cn lxp
???????????????????????????????????????????????????????????????? maxim integrated products 14 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators is the forward-voltage drop of the charge-pump diode, v schottky is the forward drop of the schottky diode of the boost converter, and v dropout is the dropout margin for the regulator. use v dropout = 0.3v for the negative voltage regulator and v dropout = 2v at 20ma for the positive-gate voltage regulator. flying capacitors increasing the flying capacitor (c x ) value lowers the effective source impedance and increases the output current capability. increasing the capacitance indefi - nitely has a negligible effect on output current capability because the internal switch resistance and the diode impedance place a lower limit on the source impedance. a 0.1 f f ceramic capacitor works well in most low-current applications. the voltage rating of the flying capacitors for the positive charge pump should exceed v cp , and that for the negative charge pump should exceed the magnitude of v cn . charge-pump output capacitor increasing the output capacitance or decreasing the esr reduces the output-ripple voltage and the peak-to-peak transient voltage. with ceramic capacitors, the output- voltage ripple is dominated by the capacitance value. use the following equation to approximate the required output capacitance for the noninverting charge pump connected to cp: load_cp out_cp sw ripple_cp d i c f v where c out_cp is the output capacitor of the charge pump, d is the duty cycle of the boost converter, i load_cp is the load current of the charge pump, f sw is the switch - ing frequency of the boost converter, and v ripple_cp is the peak-to-peak value of the output ripple. for the inverting charge pump connected to cn, use the following equation to approximate the required output capacitance: load_cn out_cn sw ripple_cn (1-d) i c f v where c out_cn is the output capacitor of the charge pump, d is the duty cycle of the boost converter, i load_cn is the load current of the charge pump, f sw is the switching frequency of the boost converter, and v ripple_cn is the peak-to-peak value of the output ripple. charge-pump rectifier diodes use high-speed silicon switching diodes with a current rating equal to or greater than two times the average charge-pump input current. if it helps avoid an extra stage, some or all of the diodes can be replaced with schottky diodes with an equivalent current rating. positive-gate voltage regulator output voltage selection the output voltage of the positive-gate voltage regula - tor can be adjusted by using a resistive voltage-divider formed by r top and r bottom . connect r top between the output and fbgh, and connect r bottom between fbgh and gnd. select r bottom in the 10k i to 50k i range. calculate r top with the following equation: gh top bottom fbgh v r r ( 1) v = ? where v gh is the desired output voltage and v fbgh = 1v (the regulated feedback voltage for the regulator). place both resistors as close as possible to the device. avoid excessive power dissipation within the internal pmos device of the regulator by paying attention to the voltage drop across the drain and source. the amount of power dissipation is given by: p gl = (v cp - v gh ) i load(max) where v cp is the noninverting charge-pump output volt - age applied to the drain, v gh is the regulated output voltage, and i load(max) is the maximum load current. stability requirements the positive-gate voltage regulator (gh) requires a mini - mum output capacitance for stability. for an output volt - age of 5v to (v cp - 2v) and an output current of 10ma to 15ma, use a minimum capacitance of 0.47 f f. negative-gate voltage regulator output voltage selection the output voltage of the negative-gate voltage regula - tor can be adjusted by using a resistive voltage-divider formed by r top and r bottom . connect r top between ref and fbgl and connect r bottom between fbgl and the collector of the external npn transistor. select
???????????????????????????????????????????????????????????????? maxim integrated products 15 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators r top greater than 20k i to avoid loading down the ref - erence output. calculate r bottom with the following equation: fbgl gl bottom top ref fbgl v v r r v v ? = ? where v gl is the desired output voltage, v ref = 1.25v, and v fbgl = 0.25v (the regulated feedback voltage of the regulator). pass transistor selection the pass transistor must meet specifications for current gain (h fe ), input capacitance, collector-emitter saturation voltage, and power dissipation. the transistors current gain limits the guaranteed maximum output current to: be load(max) drvn fe(min) be v i (i ) h r = ? where i drvn is the minimum guaranteed base-drive cur - rent, v be is the transistors base-to-emitter forward volt - age drop, and r be is the pulldown resistor connected between the transistors base and emitter. furthermore, the transistors current gain increases the regulators dc loop gain (see the stability requirements section), so excessive gain destabilizes the output. the transistors saturation voltage at the maximum output current determines the minimum input-to-output volt - age differential that the regulator can support. also, the packages power dissipation limits the usable maximum input-to-output voltage differential. the maximum power- dissipation capability of the transistors package and mounting must exceed the actual power dissipated in the device. the power dissipated equals the maximum load current (i load(max)_gl ) multiplied by the maximum input-to-output voltage differential: p npn_gl = (v gl - v cn ) i load(max) where v gl is the regulated output voltage on the collec - tor of the transistor, v cn is the inverting charge-pump output voltage applied to the emitter of the transistor, and i load(max) is the maximum load current. note that the external transistor is not short circuit protected. stability requirements the devices negative-gate voltage regulator uses an internal transconductance amplifier to drive an external pass transistor. the transconductance amplifier, the pass transistor, the base-emitter resistor, and the output capacitor determine the loop stability. the transconductance amplifier regulates the output volt - age by controlling the pass transistors base current. the total dc loop gain is approximately: bias fe v_gl ref t load i h 4 a ( ) (1 ) v v i ? + where v t is 26mv at room temperature, and i bias is the current through the base-to-emitter resistor (r be ). for the device, the bias current for the negative-gate voltage regulator is 0.1ma. therefore, the base-to-emitter resistor should be chosen to set 0.1ma bias current: be be v 0.7v r 7k 0.1ma 0.1ma = = = ? use the closest standard resistor value of 6.8k i . the output capacitor and the load resistance create the dominant pole in the system. however, the internal amplifier delay, pass transistors input capacitance, and the stray capacitance at the feedback node create additional poles in the system, and the output capacitors esr generates a zero. for proper operation, use the fol - lowing procedure to verify that the regulator is properly compensated: 1) first, determine the dominant pole set by the regula - tors output capacitor and the load resistor: load(max)_gl pole_gl out_gl out_gl i f 2 c v = the unity-gain crossover frequency of the regulator is: f crossover = a v_lr f pole_lr 2) the pole created by the internal amplifier delay is approximately 1mhz: f pole_amp = 1mhz 3) next, calculate the pole set by the transistors input capacitance, the transistors input resistance, and the base-to-emitter pullup resistor: pole_in in be in 1 f 2 c (r /r ) = where: m fe in in t m g h c , r 2 f g = = g m is the transconductance of the pass transistor, and f t is the transition frequency. both parameters can be
???????????????????????????????????????????????????????????????? maxim integrated products 16 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators found in the transistors data sheet. because r be is much greater than r in , the above equation can be simplified: pole_in in in 1 f 2 c r = substituting for c in and r in yields: t pole fe f f h = 4) next, calculate the pole set by the regulators feed - back resistance and the capacitance between fbgl and gnd (including stray capacitance): pole_fbgl fbgl top bottom 1 f 2 c (r /r ) = where c fbgl is the capacitance between fbgl and gnd and is equal to 30pf, r top is the upper resistor of the regulators feedback divider, and r bottom is the lower resistor of the divider. 5) next, calculate the zero caused by the output capaci - tors esr: zero_esr out_lr esr 1 f 2 c r = where r esr is the equivalent series resistance of c out_lr . to ensure stability, make c out_lr large enough so the crossover occurs well before the poles and zero calculated in steps 2 to 5. the poles in steps 3 and 4 generally occur at several mhz and using ceramic capacitors ensures the esr zero also occurs at several mhz. placing the crossover frequency below 500khz is sufficient to avoid the amplifier delay pole and generally works well, unless unusual compo - nent choices or extra capacitances move one of the other poles or the zero below 1mhz. table 3 is a list of recommended minimum output capaci - tance for the negative-gate voltage regulator and is appli - cable for output currents in the 10ma to 15ma range. applications information power dissipation an ics maximum power dissipation depends on the ther - mal resistance from the die to the ambient environment and the ambient temperature. the thermal resistance depends on the ic package, pcb copper area, other thermal mass, and airflow. more pcb copper, cooler ambient air, and more airflow increase the possible dis - sipation, while less copper or warmer air decreases the ics dissipation capability. the major components of power dissipation are the power dissipated in the boost converter, positive-gate voltage regulator, negative-gate voltage regulator, and the 1.8v/3.3v regulator controller. boost converter power dissipation in the boost converter is primarily due to conduction and switching losses in the low-side fet. conduction loss is produced by the inductor current flowing through the on-resistance of the fet during the on-time. switching loss occurs during switching transi - tions and is a result of the finite time needed to fully turn on and off the fet. power dissipation in the boost con - verter can be estimated with the following formula: p lxp [(i in(dc,max) d ) 2 r ds_on(lxp) ] + v sh i in(dc,max) f sw [(t r-v + t f-i ) + (t r-i + t f-v )] where i in(dc,max) is the maximum expected average input (i.e., inductor) current, d is the duty cycle of the boost converter, r ds_on(lxp) is the on-resistance of the internal low-side fet, v sh is the output voltage, and f sw is the switching frequency of the boost converter. r ds_on(lxp) is 110m i (typ) and f sw is 2.2mhz. table 3. minimum output capacitance vs. output voltage range for negative-gate voltage regulator (i out = 10ma to 15ma) output voltage range minimum output capacitance (f) -2v r v gl r -4v 2.2 -5v r v gl r -7v 1.5 -8v r v gl r -13v 1
???????????????????????????????????????????????????????????????? maxim integrated products 17 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators the voltage and current rise and fall times at the lxp node are equal to t r-v (voltage rise time), t f-v (voltage fall time), t r-i (current rise time), and t f-i (current fall time), and are determined as follows: sh schottky r-v r-v v v t = k + sh schottky f-v f-v v v t = k + in(dc,max) r-i r-i i t = k in(dc,max) f-i f-i i t = k k r-v , k f-v , k r-i , and k f-i are the voltage and current slew rates of the lxp node and are supply dependent. use table 4 to determine their values. positive-gate voltage regulator use the lowest number of charge-pump stages possible in supplying power to the positive voltage regulator. doing so minimizes the drain-source voltage of the inte - grated pmos switch and power dissipation. the power dissipated in the switch is given as: p gh = (v cp - v gh ) i load(max)_gh ensure that the voltage on cp does not exceed the cp overvoltage threshold as given in the electrical characteristics table. negative-gate voltage regulator use the lowest number of charge-pump stages possible to provide the negative voltage to the negative-gate voltage regulator. estimate the power dissipated in the negative-gate voltage regulator using the following: p gl = (v ina + |v cn | - v be ) i drvn where v be is the base-emitter voltage of the external npn bipolar transistor, and i drvn is the current sourced from drvn to the r be bias resistor and to the base of the transistor, which is given by: gl be drvn be fe i v i = r h +1 + 1.8v/3.3v regulator controller the power dissipated in the 1.8v/3.3v regulator controller is given by: p reg = (v ina - v out_reg - v be ) i dr where v out_reg = 1.8v or 3.3v, v be is the base-emitter voltage of the external npn bipolar transistor, and i dr is the current sourced from dr to the base of the transistor. i dr is given by: load dr fe i i = h 1 + where i load is load current of the 1.8v/3.3v regulator controller, and h fe is the current gain of the transistor. total power dissipation the total power dissipated in the package is the sum of the losses previously calculated. therefore, total power dissipation can be estimated as follows: p t = p lxp + p gh + p gl + p reg achieve maximum heat transfer by connecting the exposed pad to a thermal landing pad and connecting the thermal landing pad to a large ground plane through thermal vias. table 4. lxp voltage and current slew rates vs. supply voltage v ina (v) lxp voltage and current slew rates rising voltage slew rate, k r-v (v/ns) falling voltage slew rate, k f-v (v/ns) rising current slew rate, k r-i (a/ns) falling current slew rate, k f-i (a/ns) 3.3 0.52 1.7 0.13 0.38 5 1.35 2 0.3 0.44
???????????????????????????????????????????????????????????????? maxim integrated products 18 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators layout considerations careful pcb layout is critical in achieving stable and optimized performance. follow these guidelines for good pcb layout: 1) place decoupling capacitors as close as possible to the device. connect the power ground planes and the analog ground plane together at one point close to the device. 2) connect input and output capacitors to the power ground planes; connect all other capacitors to the analog ground plane. 3) keep the high-current paths as short and wide as possible. keep the path of switching currents short. 4) place the feedback resistors as close as possible to the device. connect the negative end of the resistive divider and the compensation network to the analog ground plane. 5) route the high-speed switching node lxb and lxp away from sensitive analog nodes (fb, fbp, fbgh, fbgl, and ref). refer to the max16928 evaluation kit data sheet for a recommended pcb layout. ordering information /v denotes an automotive qualified part. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. chip information process : bicmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. part temp range regulator v reg (v) boost i lim (a) pin-package max16928agup/v+ -40 c to +105 c 3.3 1.5 20 tssop-ep* max16928bgup/v+ -40 c to +105 c 1.8 1.5 20 tssop-ep* max16928cgup/v+ -40 c to +105 c 3.3 0.75 20 tssop-ep* max16928dgup/v+ -40 c to +105 c 1.8 0.75 20 tssop-ep* package type package code outline no. land pattern no. 20 tssop-ep u20me+1 21-0108 90-0114
???????????????????????????????????????????????????????????????? maxim integrated products 19 max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators typical operating circuit drvn v cn v gl fbgl gh fbg h cp ina lxp optional pgood enp seq ina 3v to 5.5v 1.8v/3.3v compi compv gate lxp pgndp fbp l p v sh c compv c comp1 r compv ref gnd positive gate voltage regulator negative gate voltage regulator bandgap reference control oscillator v sh v gh v cn 1.8v/ 3.3v regulator controller dr fb v in a to 18 v boost max16928
max16928 automotive tft-lcd power supply with boost converter and gate voltage regulators maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 20 ? 2012 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 7/11 initial release 1 1/12 corrected the c compi formula in the loop compensation section 13

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